Abstract

Terahertz reconstructive imaging technique has been used for measuring patterns on silicon chips that are hidden under top layer. The terahertz nanometrology described herein is a non-destructive, camera-less route of imaging both the surface and sub-surface features on a semiconductor chip and/ or on other substrates. Two different chips (Sample-A and Sample-B) were investigated to demonstrate the power of the terahertz nanometrology technique for measuring different patterns via imaging and graphical analysis. It was found that the dot pattern of Sample-A varied both in size and spacing; typical dot size is ~2.4μm and typical dot spacing is ~4μm. The dot pattern on Sample-B was relatively uniform; approximate size is 4.5μm. The surface imperfection of Sample-B was clearly visualized via the same imaging technique. In addition, 3D metal lines on a silicon chip have been measured for their line width, line pitch, and line depth. The results obtained from terahertz image analysis agree within the experimental error limits with those obtained via scanning electron microscope imaging.

Keywords: Terahertz reconstructive imaging; camera-less 3D (volume) imaging; Nanometrology; Semiconductor chips; Hidden patterns

Abbreviations: CCD: Charge Coupled Device; SEM: Scanning Electron Microscope; TEM: Transmission Electron Microscope; ADL: Abbe Diffraction Limit; TNS3DI: Terahertz Nanoscanning Spectrometer and 3D Imager